24 Oct
2005
24 Oct
'05
10:50 a.m.
On Mon, 24 Oct 2005, "Peter C. Wallace" <pcw at mesanet.com> wrote:
On Mon, 24 Oct 2005, Johnny Billquist wrote:
The 8650 is all ECL, man. We're talking really fast gates here...
On Sun, 23 Oct 2005, "Peter C. Wallace"
<pcw at mesanet.com> wrote:
Not sure, but my guess is that a lot of that sophisticated caching and
pipelining was needed to get the microengine to run at that 68 MHz because of
the chip-chip delays in a large multi-chip design. Well since its pretty easy to get microcode to
run at 75-100 MHz or so in
current cheap FPGAs, I'd say that 10 X a 780 should be trivial...
I'd say that's wrong. Considering that the VAX8650 microcode engine runs
at 68 MHz and manages about 7 times the 11/780, you're optimistic.
The 8650 have a very large microcode word, actually have three (or was
it four?) microcode engines running in parallell, and some very advanced
cacheing and pipelining to speed it up to get even that far. Current cheap FPGAs can manage 75-100 MHz with no
pipelining. They can
also do 32 bit adds/subtracts in < 7 or so nS. I doubt if the 8650s hardware
could manage that. Would be interesting to know the average number of
microinstructions per macroinstruction on the 8650...
It probably can do that. Without actually knowing, I would guess it
requires much less than 7 ns for an add/substract. However, since we're
talking about a pipelined machine here, you also have register copyback in
the pipe, fp stuff, the memory management with page relocation, TLB cache,
internal processor registers, and lots of other stuff going on. There is a
lot of things to cover. And since you have several micromachines, register
updates also needs to get duplicated to the other micromachines. I think I
have the documentation for the microcode for the different engines, and I
also have the binary microcode files... Anyone want to take a crack at
this? :-)
And of course, with a VAX, you have the bloody instruction fetch and
decode stuff which really is a pain. Get first byte, figure out how many
arguments it takes. Get the next byte and start parsing for the first
argument, which might be a whole number of bytes, then continue with the
next argument. Worst instructions take five arguments if I remember
correctly.
On Mon, 24 Oct 2005, woodelf <bfranchuk at jetnet.ab.ca> wrote:
Johnny Billquist wrote:
Yeah, there are some reasons why I like the 86x0 series... They are quite
brutal in their way... A number of patents DEC made on the 86x0 series
(among others) were what the fight with Intel about the Pentium and
patent infringement was about in the mid 90s.
Johnny
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: bqt at update.uu.se || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol
I'd say that's wrong. Considering that the
VAX8650 microcode engine runs
at 68 MHz and manages about 7 times the 11/780, you're optimistic.
The 8650 have a very large microcode word, actually have three (or was
it four?) microcode engines running in parallell, and some very advanced
cacheing and pipelining to speed it up to get even that far.
Also compared to a smaller machine -- remember you have floating point
stuff as well
as the basic instruction set. I forgot about that too. That is a fast
engine -- about 15 ns.