Lisa sighting at Notacon

On 20/04/11 21:26, Cameron Kaiser wrote: Which is part of the reason I'm working on FreeBee (aka 3b1emu). Like said though -- finding those bugs would involve dropping a logic analyser on the system bus, kicking off the memory protection tests, then comparing the state dump against the debug output from my emulator. It does pass the MAP RAM, VRAM and MAIN RAM tests, though. About the only thing it fails is (if memory serves) major 12, minor 1 -- page fault detection. I think I've got the rules for setting the page access bits slightly wrong. Understanding how the whole system fits together is a real pain when the schematics spread over ~15 A4 pages, plus the PAL equations and gate array schematics. And I'd still love a copy of the Field Service Debug PROMs (the monitor PROM would be VERY VERY nice) and some info on how the DMA Data Gate Array works... -- Phil. classiccmp at philpem.me.uk http://www.philpem.me.uk/