21 Apr
2002
21 Apr
'02
7:30 a.m.
see below, plz.
Dick
----- Original Message -----
From: "Ben Franchuk" <bfranchuk(a)jetnet.ab.ca
To: <classiccmp(a)classiccmp.org
Sent: Sunday, April 21, 2002 12:14 PM
Subject: Re: Micro$oft Biz'droid Lusers (was: OT email response format)
Yes ... I though the exchange rate might be a factor. There's an ad in the
local paper here in Denver that some house has got 633MHz Celeron-based boxes
with 128MB of RAM, 15GB HDD, 2xUSB, 17" Monitor, etc, including the OS
preinstalled, for $339. I think, judging from the picture, they're badgeless
eTowers. Windows-capable PC's aren't expensive.
You might check with their applications guys. They were the first to
publish
the JAM standard interface, and Cypress and Xilinx followed suit.
I'll check with a friend of mine who's an Altera agent, but ALTERA
certainly
has a CPLD solution to that problem. I think the JTAG<=>parallel-port
solution is more appealing for someone in your situation, however, since you
can use a backup battery to keep it alive and you can reload it from your PC.
BTW, if you are designing your own hardware, wouldn't it make sense to do what
that microcontroller would do in some sort of hardware? All you have to do is
address the standard EPROMS and serialize their output in sync with the FPGA's
signals to what it thinks is the serial PROM.
I can see how you might arrive there.
Richard Erlacher wrote:
<snip 17"
monitor for < $600.
I forgot to state CANADIAN :) and that was a ball park figure.
> Altera and Xilinx have published parallel port JTAG programming interfaces
for
their devices.
I have not been able to find Altera's. Xilinx's schematic is in the
documentation as a apendix to the programing manual.
> If you attach the EPROM/EEPROM that contains the configuration file for an
<snip requirements
for programming them a secret.
With altera ( the fpga I have ) serial proms are the only easy way to
program the chip. I still need a uP to program the FPGA from standard
memory.
> Programming most of the logic in 'C' is pretty well accepted practice
since
> EPROMS are as big and inexpensive as they are
today. Critically timed
code
> has to be written in assembler, and people often
forget that. Many
designers
compensate for
code that is inefficient, slow, and large, by using a
controller chip that has WAY (20x) more code space and performance than
needed. The coders will use it all.
I guess waiting for 4k focal to load on a TTY gives me a bias against
bigger systems.