On Sun, 11 Jan 1998, Tony Duell wrote:
........
What is the reset pin doing at the Z80? And what is
the WAIT* pin doing.
I wonder if the CPU is either stuck in the reset state, or in a wait
state.
RESET* is low for about 500 ms after power-on, then goes high. WAIT* is
always high.
I'm pretty sure that if the CPU is halted, it
continues to produce
refresh addresses, so you'd see some activity on the address lines and on
RFSH*. Can't hurt to check, though.
RFSH* is at a solid 1.4v, and doesn't move with a pull-up.
I assume the clock input is going high enough - from
memory a TTL output
needs a pull-up to drive a Z80.
CLOCK is swinging from 0.2 to 4.8v at 4MHz.
You really need to be able to distinguish
'Low' from 'Tristate'. If
you're using a 'scope, then pull the input to the Vcc (+5V) line through
a resistor equal to the 'scopes input impedance (1M for most 'scopes, 10M
if you're using a *10 probe) so that the trace floats at 2.5V and
indicates highs and lows. Very few logic analysers (the HP LogicDart is
an exception) have high/low/undefined inputs, alas.
Well, I did almost as you said. I had a 47k resistor laying handy on
the bench, so I used it. Part of the address bus is low (0.2 or 0.3v),
part is tri-stated. Data bus lines D0-D2 and D7 are at a firm 1.4v. D3
is tri-stated and can be pulled to 5v. D4-D6 are low and pull-up to 1.4v.
Now, here's where it gets interesting. NMI* had an irregular pulse train
coming into it- at the same time the display was flickering. I shut off
and turned on again, and the display was blank and NMI* was high. INT*,
WAIT*, BUSRQ*, and RESET* are high, BUSAK* is low, and HALT*, MREQ*,
IORQ*, RD*, WR*, M1*, and RFSH* are all at a solid 1.4v. (???)
Do you have a schematic of the gate-array version of
the M4 CPU board?
I've got an M4 here with said board, and it's the only part of the system
that's not covered in the M3 Techref (which I also have), so I am looking
for a copy/scanned in version of the diagram.
I would buy a Model 4 technical manual, but Tandy in the UK are totally
clueless and assured me that there was no such machine as a 'TRS-80' :-)
I have a 6-page schematic for the CPU, and it shows 4 PAL's. It is dated
23 Feb 1983. Contact me privately and we'll work out how to get it from
here to there.
Richard Schauer
rws(a)ais.net