8 Nov
2007
8 Nov
'07
1:32 p.m.
Lee Davison wrote:
This is all a tempest in a teacup. In computer architecture classes,
one of the things that is stressed quickly is to separate the
consideration of architecture from implementation.
The 68000 family was clearly a 32b architecture. Yes, a few
instructions fell short of that, but 95% of it was 32b.
Implementation is another matter.
From where I sit, I wouldn't hesitate to call a 68008 a 32b processor,
as the bus interface affects speed, not function. If I took a 68020 and
clocked it slowly enough, it would look a whole lot like a 68008 from
outside of the computer cabinet. In fact, the 68020 allows for dynamic
bus sizing; by controlling a couple pins appropriately, you can also
make it use only 8b of the data bus. Does that really affect how you
view the machine? Not really; it just is slower.
There's a
reason I described the 68000 as a 16/32 processor earlier
today... internally it *is* 32 bits. The bus interface is just reduced
to save on the pin count, etc.
Look at the size of the ALU and the
accumulator(s)/data registers, then
come back to me.
The MC68000 only has a 16 bit ALU and longword operations are done in
low/high word sequence. This is why some longword operations take two
more cycles than their equivalent word forms.
Lee.