12 Dec
2008
12 Dec
'08
9:31 p.m.
Chuck Guzis wrote:
On 12 Dec 2008 at 10:47, bfranchuk at jetnet.ab.ca
wrote:
How about a 20-bit word size, 4 bit opcode, 65KW addressing space,
simple one-address+accumulator machine? Enough directly-addressable
memory to do just about whatever you need to do, simple to implement.
Cheers,
Chuck
That was last weeks design. :(
That is 3 opcode bits and a indirect bit. Going to 4 opcode bits
gives you 32K of memory and would make a nice small machine
that dates around the early 60's.
The problem is that I want to have local function variables, and that
requires
a stack frame pointer and one index register at least for structure address.
(A 6809 DP style register provides global variables, but hardware
relocation is
not possible.) This architecture requires a register file and alu design
rather than
the dedicated logic of a AC,PC,MAR and MBR on a classic machine.
The CPLD's don't have ample hardware for a complex machine like a PDP-11
but they do just have the capacity for machine's hardware somewhere between
the 6800 and the 6809.
Word and byte operations for LD,ST,ADD,SUB,AND,OR,XOR. {AC,IX,SP)
Addressing modes
1) # long :immedate long
2) #short :immedate short
3) (0,dp,ix,sp) + nnn : indexed
4) @ (0,dp,ix,sp)+ nnn : indirect indexed.
Direct and # addressing modes AC ONLY
JMP,JMS,JZ,JNZ,ADC,SBC
Direct only - INCRIMENT/DECRIMENT MEMORY
INC,IN2,DEC,DE2
Special function - AC,IX OPERANDS
LEA,STX,NEG,NGC,SCC,{SHIFT},EI,DI