2 Oct
2010
2 Oct
'10
7:23 p.m.
From: eric at brouhaha.com
Dwight wrote:
Hi
Half area but just as long in time.
Dwight
Another possible is to put an incrementor on the
output.
This is a simpler circuit than a full adder.
In "discrete" logic, or in an ASIC, it is simpler.
In most FPGAs, it will end up taking the same resources and having the
same performance as a full-adder.
Eric