10 Apr
2002
10 Apr
'02
2:02 p.m.
On 10-Apr-2002 Richard Erlacher wrote:
I think here lies the source
of our misunderstanding: I didn't mean a
program as in C or even VHDL. I didn't even think of any "design tool".
What I meant (and wrote) was "design view". But I must admit that the word
"program" wasn't the right choice either... ;-)
A "microcode-program" (in my understanding)can be thought of as a very
primitive kind of Assembler where you don't have anything but the
current-state and the inputs.
The Address of the ROM is the current-state (lets say the line-number
of the programm). Every line of Code consists only of the "outputs" and
one or more "next states". The "inputs" select which "line"
comes
next: Either the next "line" of Code (that's what the counter is for),
or one of the "next states". I made a mistake there, the Microcoded Machine
has to look like that:
|---|---> OUT
address | R |--->
|-->| O |---> |--[Counter]
| | M |----| |
| |___| \MUX/<--- IN
| |
|-[StateReg]<--
Actually, it's all done with software. You simply
specify what you want and
tell the software tools to generate it. Part will be implemented in
I know, but
that wasn't point. I tried to explain the difference between
a "microcoded Design" and a "state machine".
Or at least what I think it is... ;-)
[...]
On a high
level design view it's called state-machine if you draw a graph
and "microcoded" if you write a program.
Today's tools require that you write a program. Whether you do it in C++ or
VHDL is up to you, but it's a program either way. > The first design is smaller and faster and the
second can be changed more
> easily...
While this may have been true a decade or more ago,
it's no longer the case.
Well, this is the classiccmp-mailinglist, isn't it?
;-)
While I agree that today no one does such a design by foot but the principle
is still the same. Even in modern^H^H^H^H^H^H currently marketed CPUs
like the Pentium4 there are microcoded Areas where you can load updates
to correct bugs. Intel has learned it's Pentium-Bug-Lesson.
The "next-generation" tools will take a
program in a high-level language and
specify both the hardware and the software from a single source file,
including the architecture and instruction set of the CPU if there is one.
The software tools will determine which part goes in the FPGA and which goes
on the hard disk.
Hardware-Software-Co-Design is a very interesting research area
but
IMHO it will still take a while till the results hit the market.
bye
Thilo
--
The most exciting phrase to hear in science, the one that heralds new
discoveries, is not "Eureka!" (I found it!) but "That's funny
..."
-- Isaac Asimov