16 Dec
2018
16 Dec
'18
8:50 p.m.
On Dec 16, 2018, at 8:21 PM, allison via cctech
<cctech at classiccmp.org> wrote:
On 12/15/2018 03:51 PM, Jon Elson via cctech wrote:
Frankly even in those applications (RF11/DF32) I?d use MRAM (available in 2Mx8)
rather than FLASH because (a) it?s byte addressable (b) it has unlimited write endurance
(c) it looks like SRAM so there?s no erase cycle (or blocks) to deal with so it makes
the hardware easier (e.g. it should be possible to implement one of those controllers
just with logic and not require a microprocessor).
BTW, that?s what I use for the emulators that I?m working on (when I have time?in
short supply at the moment).
I also use them even when I do use FLASH as I can use it as a buffer/cache to help
absorb some of the write/overwrite cycles and to be able to handle (non-volatile) full
FLASH block operations and for wear leveling (tracking and block remapping). That
way I don?t have to deal with a PMIC and battery. MRAMs also have a >20 year data
retention as well (something you don?t have with a battery?if the battery dies, you
loose everything).
TTFN - Guy
On 12/15/2018 02:45 PM, Anders Nelson via cctalk
wrote:
The only place where Flash or similar tech fits is applied to the mass
storage problem such as replicating
a RF/DF32 multihead disk.
The cycle life is a limiting factor for things like swapping drums/disks
but for something that's
read mostly its ok. Serial flash has an endurance between 10K-100K
writes per cell so I
think
that would break down quickly. Wear-leveling on a serial device would be
very slow...
If you intend to use it as main core memory on an old CPU, it will
perform VERY poorly, as these memories need to erase a page at a time,
and the erase takes milliseconds. So, writing ONE SINGLE word at a
time would invoke an erase cycle each time, slowing it to 1/1000 or
worse the speed of the original core memory. Also, most old CPUs have
the memory timing built into the CPU, and can't handle a memory that
says "wait".
Jon