PAL introduction (was MITS 2SIO serial chip)

I scanned a few pages from a book I co-authored, I skipped the figures. If any one wants to see a figure or picture I can put it a web site. ----------------------------------------------- Michael Holley www.swtpc.com ----------------------------------------------- By David Pellerin and Michael Holley Prentice Hall 1991 The First User-Configurable PLAs Intersil Corporation and Signetics Corporation, both manufacturers of PROMS, realized that the structure of National's DM7575/DM8575 mask-programmed PLA device was ideal for a field programmable device. It became a race between Intersil and Signetics to bring the first such devices to market. Both of these companies called their proposed new devices FPLAs for field programmable logic array. In the June 2, 1975 issue of EE Times, Intersil announced the IM5200 Field Programmable Logic Array (FPLA). Soon after, Signetics introduced its 825100. These devices were ahead of their time in many ways. The data sheet for Intersil's IM5200 FPLA is shown in Figure 2.3. These first FPLAs were powerful devices (the 825100 is still available, under the new name of PLS100). They provided a reasonable number of inputs and outputs, and were flexible enough in their design to be used for a wide variety of logic applications. While on the surface the IM5200 and 825100 looked very similar (the 825100 featured two more inputs than the IM5200), they were in fact quite different in terms of their programming technology. Rather than use the well understood fusible link technology for their new device, Intersil chose to use a new type of programmable element that had been developed for their PROM devices. This programming element was designed to improve the programming yields over earlier programmable devices. The technology, called avalanche induced migration, or AIM, utilizes an open base NPN transistor as the programming element. To program an AIM element, a high current is forced through the transistor from the emitter to the collector. This causes a short from the emitter to the base, which leaves the transistor to operate as a diode. Unfortunately, the actual devices that rolled out of the Intersil's foundry turned out to be unreliable, with low programming yields, and the Intersil devices were not successful in the market. The Signetics 825100, which utilized the fusible link programming technology, was more reliable and more successful in the market. Another factor in the success of the Signetics devices was the efforts of Napoleone Cavlan who was, at that time, Signetics' Manager of Advanced Products. The new devices were completely unfamiliar to most circuit designers and required a much higher level of user education and promotion than the earlier programmable devices. Even with a high level of promotion, documentation, and applications support, most digital designers chose not to use these first PLDs because the devices were still perceived to be too difficult to use and because of the risk of relying on the new technology for critical circuit elements. Even with the reasonable reliability of the Signetics devices, the FPLA had a relatively slow maximum operating speed (due to the two programmable arrays), was expensive, and had a poor reputation for testability. Another factor limiting the acceptance of the FPLA was the large package. The Signetics part, for example, was contained in a 28-pin DIP (dual inline package) that was over a half an inch wide. Today, 28 pins is standard for PLCC (plastic leaded chip carrier) type packages but, in the 1970s, smaller packages were the norm. Physical and operating limitations aside, other difficulties were experienced by designers who used the devices. The challenge in using the FPLA devices stemmed from a conceptual difference between how the designers had created circuits in the past and how they were forced to create them using FPLAs. Designs that were to be implemented in FPLAs had to be described in an unfamiliar format that bore little resemblance to the familiar schematics or Boolean equations that logic designers had used in the past. To design a PLA circuit and program a device, the user would first convert the design into a tabular form called H&L. A sample of the H&L format is shown in Figure 2.4. The data from the form was then entered into a device programmer, such the Data I/O Model 10 shown in Figure 2.5. This programmer was designed specifically for the Intersil and Signetics devices and had a CRT and built-in H&L editor. A major advance that this programmer had over the previous PROM programmers was its ability to exercise the programmed part functionally and compare its operation to the results calculated in the programmer. This meant that faulty or misprogrammed parts could be quickly identified and rejected. GE's Associative Logic Although Intersil and Signetics were the first companies to successfully market field programmable logic devices, they were by no means the first to develop them. As early as 1971, General Electric Company was developing a programmable logic device based on the new PROM technology. The device was developed by David Greer, then with GE in Syracuse, NY. GE's experimental device improved on IBM's ROAM structure by providing an internal path for OR-plane signals to directly reenter the AND plane. This allowed the use of multilevel logic with no waste of I/O pins. Late in 1971, an experimental MOS programmable logic device was completed at the General Electric Research and Development Center in Schenectady, NY by Gerry Michon and Hugh Burke. Not only did this device feature the improved PLA-type logic array, but also used the floating gate UV-erasable technology announced earlier that year by Intel. The GE device (shown in Figures 2.6 and 2.7) was actually the first erasable PLD ever developed, predating commercially available EPLDs by over a decade. Researchers at General Electric not only developed the first working FPLAs and EPLDs, but also described and patented a folded array structure remarkably similar to the folded arrays that began appearing in complex PLDs nearly fifteen years later. In 1974, under the terms of a patent and trade secrets agreement with GE, Monolithic Memories began the development of a mask-programmable logic device incorporating the GE innovations. The device was named the programmable associative logic array, or PALA. The device (MMI part number 5760/6760) was completed in 1976, and could implement multilevel or sequential circuits of well over 100 equivalent gates. In addition to its advanced structure, the device was supported by a highly automated design environment developed by GE. Designs were entered using Boolean equations and converted automatically to a mask pattern. The system even included a facility for test vector generation and simulation. While the MMI/GE device was never marketed, it did serve as a model for PLDs produced by a number of manufacturers in later years. MMI's PAL Although the Signetics devices enjoyed some success, PLDs didn't really gain widespread acceptance until the late 1970s, when MMI introduced the PAL device. After working with GE on the PALA device, MMI's first effort in the design of their devices was to reproduce the Intersil and Signetics FPLAs. A few hundred copies of the Signetics 825100 were produced for internal evaluation, but these devices were never released. From this experience, and MMI's earlier experience with GE, the PAL device was born. The new family of devices was announced in the summer of 1978. The project to create the PAL device was managed by John Birkner and the actual PAL circuit was designed by H. T. Chua. Birkner had come from Computer Automation, Inc., where he had developed a 16-bit processor using 80 standard logic devices. His experience with standard logic led him to believe that user programmable devices would be more attractive to users if the devices were designed to replace standard logic. This meant that the package sizes had to be more typical of the existing devices, and the speeds had to be improved. The new devices that resulted from this thinking were a breakthrough and a huge success in the market. The PAL devices utilized the now mature and reasonably reliable PROM fuse technology and featured only one programmable array. This combination resulted in a device with much faster operation than the earlier FPLAs. Programming of the devices was simple since they were implemented in industry standard packages and used well understood PROM fuse technology. One factor in the success of the PAL devices was the high level of customer support offered by MMI in the form of applications and user documentation that served to demystify the design process. The PAL Handbook, written by Birkner himself, provided a conceptual bridge between the discrete logic methods of the past and the high-level design methods of the future. One indication of the success of the PAL is that, ten years after the introduction of the first 161_8 and 1688 PALS, these devices still made up the majority of all PLDs used even though there were over 200 unique PLD device types available at that time. In recent years, more flexible devices such as the 22V 10 have begun eroding the 16L8/16R8 monopoly, but even these devices are based in large part on the original Birkner/Chua design. Similarly, the PALASM language remains a widely used method of PLD design description. Most, if not all, of the current PLD design tools can trace their heritage back to PALASM. Another factor in the success of the PAL was the level of programming support. The earlier FPLAs had suffered from the same programming problems that plagued early PROMS; unreliable customer-built programmers and little understood programming algorithms. John Birkner and his crew were determined to make the PAL a success, so they worked very closely with programmer companies to ensure that reliable programming would be accessible to the device users. The first PAL programmer was developed as a joint effort between MMI and Data I/O and actually utilized two PALS as part of its construction. This meant that the first prototype PAL programmer had to be bootstrapped by emulating the function of its own PALs with PROMS and some additional TTL devices. The first few years of PAL production weren't without their problems, however. Production couldn't keep up with demand, and production yields suffered. In addition, the programming algorithms (the specific programming voltage and waveform specifications) hadn't been finalized, leading to often unacceptable programming yields. The PAL shortage had a serious impact on end-users of the time. Tracy Kidder, in his book Soul of a New Machine, chronicles the development of the Data General MV8000 computer. The designers of the MV8000 had gambled on the new PAL devices, and were soon feeling the effects of limited supply. Kidder describes a plaque awarded to Data General engineers working on the redesigned Eclipse computer, another large design that used a number of PALS in its construction. The plaque was named the PAL award, but where a commemorative device should have been, there was instead an empty socket. Digital Equipment Corporation also felt the effects of limited PAL supplies when designing their new VAX 730 computer. To overcome the supply problems, DEC's semiconductor liaison suggested to MMI that they should produce a mask programmable version of the PAL for large quantity production. This was done, and the resulting product was named the HAL for hard array logic. HAL devices corresponding to all of the PAL devices were produced. These devices were mask programmed as specified by DEC and other customers. The HAL devices weren't without their own problems; in one early production run, MMI neglected to properly label the many HAL silicon wafers that were being produced for the VAX. According to Paul Franklin, then with MMI, it became necessary to carefully examine every wafer with a microscope in order to determine exactly which HAL devices they were composed of. The PAL survived its early teething pains and exploded in the market, earning MMI millions of dollars. The HAL turned out to be a marketable product as well and is still available. For their efforts, MMI rewarded both John Birkner and H. T. Chua with unique bonuses-new cars every year. The October, 1982 issue of National Geographic, in an article about silicon valley's glory years, pictured Birkner and Chua with their fourth such annual bonuses-a Mercedes and a Porsche. Another factor in the success of the PAL devices was PALASM, which stands for PAL Assembler. PALASM was a computer program written by John Birkner that converted design descriptions composed of Boolean equations directly into programming data for a specified PAL device. Boolean equations have been used since the early days of logic design (long before the integrated circuit was conceived of) to express logic functions. Boolean algebra is at the core of any university course in digital logic, so it's a form of representation that is more familiar to engineers than tabular forms. PALASM was a simple computer program written in FORTRAN. The entire program required only six pages of FORTRAN source code and was published in the PAL data book. A typical PALASM design file is shown in Figure 2.8. The simplicity of the PALASM language made it possible for programmer manufacturers to implement the language directly in the programming hardware, as was done in the Data I/O LogicPak, the Structured Design programmer, and other similar PAL programmers. -------------------------------------------------------------------