18 Dec
2008
18 Dec
'08
10:19 p.m.
Philipp Hachtmann wrote:
To be clear:
My PDP-8 currently does 50000000 additions/second. Or 100000000 operate
or jump instructions/second.
Well that does make it the fastest 8 on the planet.
Best wishes,
Philipp
I am lucky if I can get normal memory speeds ( min 1970's ) with my CPLD design
but most the problem is that I have to use slow I/O chips. I don't use pipelining
with my design so I figure I have about 4 gate delays for control signals, 4
gate delays
for datapath logic and 4 x 2 gate delays for carry to ripple. With the cheap
chips I have
( 20 ns delay ) I have no problem with creating a computer up to 2 Mhz ... nice
and slow
but it does fit my goal what cpu that is not 8 or 12 bits wide on the data path.
The 20 bit cpu alas can't be a (fictional) single chip cpu since I can't fit it
into a 48 pin dip.
I am two pins extra. [1]
Ben.
[1] They are inputs so I might be able to multiplex them in but it is messy.