31 Aug
2016
31 Aug
'16
5:42 a.m.
On Aug 30, 2016, at 8:15 PM, Eric Smith <spacewar
at gmail.com> wrote:
On Tue, Aug 30, 2016 at 1:28 PM, Paul Koning <paulkoning at comcast.net> wrote:
Yes, the one I saw when I made that comment is an MSM51V18165F by Lapis, a 1M by 16
"fast page mode" EDO DRAM.
Another possibility would be a current (not
surplus) DRAM device such as a 1M x 16 chip, plus a couple of level shifters to go between
the 3.3 V it likes and the 5V logic of the Pro.
WARNING: Most recent 1Mx16 DRAM devices are synchronous DRAM (and
usually DDR of some description), which are NOT EVEN CLOSE to being
electrically compatible with legacy 16-pin DRAMs, nor even the 1 Mbit
and 4 Mbit legacy DRAMs.
Most of the ones that aren't synchronous are 3.3V parts, and won't
work reliably if at all in a 5V system without the level shifters Paul
mentioned. I commonly use 74LVC245 buffers between 5V and 3.3V logic,
when the 5V logic doesn't require a full 5V swing (e.g., Voh min of
2.0V for TTL-compatible parts). It does appear that ISSI still makes some 5V 1Mx16
non-synchronous
DRAMs in either EDO or Fast Page Mode. There's a reasonable chance
that the 5V Fast Page Mode devices would work for replacing legacy
DRAM, and wouldn't require any level shifting.
That would be interesting to try.
paul