5 May
2001
5 May
'01
11:50 a.m.
From: Chuck McManis <cmcmanis(a)mcmanis.com>
tools are *free*. You do have to take the time to learn
VHDL but so far
the
payoff has been worth it for me. I'm having a blast
with this thing. My
VHDL.... that was the cost I refer to. Most of me design experience
is pre VHDL availbility. I already have the Lattice Synario and that
bends my mind greatly. I havent used the small 2064 and 3030 FPGAs
I have a good handful of yet. Time is costly for me these days.
"final" is a PDP-8 w/ Serial terminal (think
DECMate in a single chip)
with
full lights and switches. This chip can do that easily.
I don't think it
Major cool. My personal "I'd like to do" is a 32 bit wide '8 by
grafting
another 20 bits to the right side of the word and running it fast. Same
instrcution set and the left 5 bits would remain the same. I'd use all
32 bits for OPR instructions to eliminate decoding (one per bit) and
simplify the IOT interface some. Obviously the page (formerly 128
words) would be much bigger but direct addressing of 256MW
out of a 4gb address space wouldn't be a significant shortcomming.
I doubt I'd need to do the EMA. ;)
Allison