RTL Logic

Well, except you generally get wired-AND, because the open collectors are generally NPN collectors with emitters to ground, not PNP collectors with emitters to Vcc. Except that totem-pole outputs usually have just a transistor to ground, but a transistor and resistor to Vcc. This means that the one driving the signal low will win, and, provided not too many outputs are wired together, it will sink the current without damage. (I've actually built circuits that depended on this, though I've never liked it and never considered it suitable for more than preliminary hackery. I've also always never done it for anything where the conflict will last more than nanoseconds, as when building an ~R/~S flip-flop out of two cross-coupled inverters rather than the more usual NANDs or NORs.) Of course, this depends on the details of the output pin circuitry and hence does not really apply to things like CMOS TTL-alikes (unless they go to the trouble to also simulate this aspect of TTL - I don't know whether they do). /~\ The ASCII der Mouse \ / Ribbon Campaign X Against HTML mouse(a)rodents.montreal.qc.ca / \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B