One thing to
be aware of. The video board cna use wither 4116s or 4164s
-- 16 of either, all must be the same type. There are some obvious links
to move if you upgrade the RAM (if you don't shift them, you'll ruin the
4164s by applying 12V to them!), but there are also some decoupling
capacitors that _must_ be removed if you use 4164s. If not, you get ome
odd corruption after the screen has scrolled a few times. Don't ask how I
found this out...
VERY good to know... thank you.
The point is that one pin of the DRAM goes from +5V power to the A7
address input. In the former case (4116s), it needs decoupling, in the
latter, hacing around 1uF of capacitance to ground _really_ screws up the
timing...
The problem is that (as ever), dcoupling capacitors are not shown in the
scheamtics, so it took me some time to realise what was going on.
Incidentally, there are 2 versions of the video board .The later one has
a 40 pin gate array chip containing logic that was all TTL on the
olderone. Alas both mine are the later type.
My understanding is that Valdocs 2 was written in
Forth, and Valdocs 3
I heard a Threaded Interpretted Language, not spccifically Forth. But I
can;t comment further
-tony