23 Apr
2007
23 Apr
'07
6:19 p.m.
Still debugging. I checked all the obvious things.
DC LO L is high on the bus, TP1 shows clock. Voltages appear nominal.
I put some logic analyzer leads on the 8008 and it resets correctly and
INTR goes away. (I have a nice picture if anyone wants it)
I see it enter state T1, T1I, T2 and then WAIT. But RDY is high. This
seems odd. It should go to T3.
Also, my read of the KY11B docs say that I should not have J2 & J3
connected unless I'm in maint mode. (so pulling RDY high should be fine)
Should the KY11 work (as the docs say) with only J1 connected? Anything
obvious I am missing?
-brad
Brad Parker
Heeltoe Consulting
+1-781-483-3101
http://www.heeltoe.com