14 May
2004
14 May
'04
1:06 a.m.
Jochen Kunz wrote:
...
yes, but you also need to worry about back-to-back accesses by the
unibus cpu. the 'card micro' needs to be able to get in and do it's
magic between the unibus cpu's two cycles...
i.e. bus locking...
-brad
For older disk
controllers, this approach is likely to be hard because
touching CSRs causes actions to take place,
Programm and wire the CPLD so that it
generates an interrupt to the PIC
when the register file is touched. Issue a vector along with the
interrupt that tels the PIC which CSR was touched.