On Mon, 5 Apr 2010, Dave Dunfield wrote:
Without a boot disk, your only option is to make use
of the 1K ROM socket on
the CPU card - it takes a 2708, but you can build an adapter to use a larger
device if you don't have or can't program a 2708 - you can even use something
like the Dallas battery-backed-up RAM chips (**) which make erase/program
cycles very fast -keep in mind that you don't need it to look pretty - you
only need it until you have a boot disk up and running, and you can put the
CPU back a couple of slots to allow room for the adapter.
I have a couple of 2708s in the parts drawer and my Andromeda programmer
can handle them. All set there.
(** if you go this route, know that the DS chips have
a power-monitor which may
not release until after the simple CPU reset circuit - so you may have to power-
up and then issue a reset to get it to start properly).
The console will probably be at 9600 (unless someone has changed it). Check the
jumpers to be sure.
As noted above, make sure you can deselect a suitable area of the memory map to
make room for the monitor.
Remove anything un-necessary when getting the monitor up and running - that means
pull the FDC (and the 8" one if you haven't already) - since my monitor does
not
require RAM, you can pull the RAM card as well - so all you will have in the system
at first is the CPU.
Set the ROM address, and POJ (power-on-jump) headers to the address where you origned
the code for the ROM (I provide a utility that will show you the correct settings for
any given address).
If the monitor does not "come up", and you have access to a scope, check out
the
ddress us while it is running - since it will be sitting in a very tight loop, you
should see a recognizable pattern - several cycles within the ROM address space (only
the lower few address lines should toggle) and one access to the UART I/O address.
If that doesn't seem right, then you can use tricks like tying the ROM select to the
wait line - it should halt at the startng address of the ROM. Also, with a storage
scope and a little patience, you can capture the first few bus cycles - you should
be able to see the power-on-jump address at the beginning. ... But this is getting
beyond the scope of this reply.
Once you see it's running it's polling loop, then you can track down the
accesses
to the UART to debug it at the hardware level if necessary.
Once you get to the monitor '>' prompt, you are well on your way!
Put the RAM card back in, and verfy that the monitor still runs (ie: you did de-
select a block for it properly) - then use it to write and readback some locations
where there should be RAM and confirm that it appears to be there and holds it's
content.
Then put the N*FDC back in and confirm that the monitor runs - from there, you can
proceed to the documentation in my simulator/NST package which should give you
enough information to create a boot disk (Assuming the FDC works - debugging that
is another excercise).
Cool! Thanks _so_ much for taking the time to write that up. Will let
you know how it works out.
Steve
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