16 Apr
2007
16 Apr
'07
11:56 a.m.
Chuck Guzis wrote:
On 15 Apr 2007 at 19:36, David Comley wrote:
I'm not sure - remember the task is to emulate a drive, not a controller.
Isn't an MFM ST506/412 drive just a bucket of rotating bits and a track stepper?
Or does the index pulse function more like that of a hard-sectored floppy -
i.e. the number of sectors per track is fixed in hardware, and there's an
index pulse at the start of each sector?
Even if that is the case, I wouldn't have thought it makes much difference -
it just means that buffer memory and permanent storage is organised a little
differently. The device is still like a big floppy, just with more heads and
the need to record faster timings between bit transitions: the principle's the
same, it just needs someone with experience of working with fast logic to
design the board layout and code for whatever CPU / DSP is used.
cheers
Jules
Exactly. My intended uses are primarily
VAX/VMS-based.
Since, as in floppies, you're dealing with raw (unseparated ) data at
5MHz or thereabouts, recording bit transitions is out of the
question. So you'd need some circuitry to both interpret and to
synthesize not only bits but the various address headers and CRCs.
IIRC, there wasn't a huge amount of interchangeability between the
various controller vendors, so you'd need several (selectable)
routines to handle that. Then there's the matter of RLL and ARLL--
and synthesizing CRC or ECC results.