On Fri, 22 Apr 2016, Sean Conner wrote:
One major problem with adding a faster CPU to an SGI
is the MIPS chip
itself---code compiled for one MIPS CPU (say, the R3000) won't run on
another MIPS CPU (say, the R4400) due to the differences in the pipeline.
Oh and you are so totally correct. I forgot about that, but yes, it's all
coming back now. I remember reading about that in some MIPSPro C
documentation. Well darn. There goes my dream :-0
I guess I could still posit that some advanced form of dynamic translation
would be able to do it, but that sounds extremely daunting.
MIPS compilers were specific for a chip because such
details were not
hidden in the CPU itself, but left to the compiler to deal with.
Ugh. That doesn't sound like such a great idea, but what do I know. That's a
very weird intersection of hardware and software that I couldn't begin to
unravel.
-Swift