3 Jun
2006
3 Jun
'06
8:16 a.m.
dwight elvey wrote:
Hi
One thing that one should consider is that just tying descrete TTL's
is not the same as how it would be done on silicon. Combining nands
together would create a AND OR structure with no inversion.
Yes, but you can cascade a NOR following an AND. A NOR would be
preferred (over OR) as ORs are slow.
When doing it on silicon, it is easier to move the and
and or functions
to the inputs but then to drive the output requires the inversion.
As is mentioned this creates the AND OR invert structure that
would be faster than combining simple nand gates together making
the non-inverting AND OR.
These were, as mentioned, used as multiplexers. These were also
better to have inverted outputs for the DTL and RTL type setups.
The outputs could be wired together from several devices to drive
a single bus line. As long as the selects were all zero, on one device,
the output would be high, the undriven state of the output, the
other device could then drive the bus. As I recall, some of the TTL
devices had open collector as well and could be used this way.
That depends on the AOI. Some had totem pole outputs.
Others were OC. And, not all were "expandable".
Note that the *expanders* could be used for wired AND *or*
wired OR logic as they typically had uncommitted collectors
*and* emitters on the output stage.