1 Feb
2022
1 Feb
'22
11:43 a.m.
On Feb 1, 2022, at 8:20 AM, Bob Smith via cctalk <cctalk at classiccmp.org> wrote:
KMC11 - Paul K cited the docs. It was a bit different from DMC CPU board
in both cycle time and in the use of ram versus prom.
Both boards/products used the 4bit Alu but I don't call that bit
slice, as the 2901 is more of a bit slice.
KMC and DMC are Harvard architecture based devices, as is the 11/60 CPU.
DMC and KMC benefited from the microcode work of Harvey Schlesinger,
Bob Rosenbaum, Richie Larry, and I think Clarise joined the team in
77. Can't recall her last name.
Patton? Harvey, Bob and Clarise joined the DECnet-RSX development team sometime in 77/78.
John.
DMC had (when I left the project and it had been
shipping for a year
or two) a 300NS cycle time, while the KMC had a 240NS cycle time
thanks to the instruction register I had suggested to remi as we were
thinking of a RAM based device because PROMS were a royal pain with 2
and 3 code changes a day. This change allowed the machine to begin to
access the next instruction as one was executing - there are no
interrupts in either board.
bob