Monitor for iSBC 8024

Pleasesee embedded remarks below. Dick ----- Original Message ----- From: Mike Cheponis &lt;mac(a)Wireless.Com&gt; To: &lt;classiccmp(a)classiccmp.org&gt; Sent: Saturday, November 04, 2000 12:17 AM Subject: Re: Monitor for iSBC 8024 That's interesting! I was comparing the quoted sizes of a couple of HDL versions available on the web. The smalles 650x I found was about 3200 gates, while the smallest Z80 was listed at 9200. It's difficult to say whether that's the actually-used gate count, or whether it's the gates used as a consequence of the implementation. If a logic cell is used, regardless of how much of that LC is used, the "gates" contained within it are gone, whether it's a nand gate or an adder, or whatever. The counts listed within an IP item description usually are reflective of what's used rather than what's consumed, so it can be quite misleading. Sometimes they specify how many cells it uses in a given array series, which gives a better count of consumed resources if one's looking to use that particular family. If one wishes to use something else, however, it's tempting to use the number of cells x the number of gates each cell represents, which is often "optimistic" with respect to what's likely to be the actual result of a fit. Eric Smith reminded me some weeks back that the Z80 has two complete register sets, which pretty quickly leads me to conclude it's justified in consuming considerably more resources in an array than the 650x core. One might conclude that the 8080 should lie between the two, since it has more registers than the 650x, yet fewer than the Z80. The transistor count is not quite reflective of the register resources, but it does appear that the 8080 has more transistors used than the 650x. <snip>