15 Aug
2010
15 Aug
'10
11:43 p.m.
On 15 Aug 2010 at 16:58, allison wrote:
Watch out,
Some parts like the 6504 are not fully static and the
logic is somewhat dynamic with the transition of CS
performing the precharge of the gating logic around a
static cell. That means you must cycle CS for every
address change withing a read/write or RMW cycle.
I think you're saying that the address is latched on the edge of the
enable/chip select line. That's probably okay in this situation, I'm
guessing.
--Chuck