On 2/15/10, Al Kossow <aek at bitsavers.org> wrote:
The problems are in the Amigo and CS80 protocol timing
details.
http://www.hp9845.net/9845/projects/hpdrive/
figured it out, but thanks to it being closed-source you all get
to figure it all out again
Interesting link. I learned much of the details of why it's difficult.
At least you have the 'describe' parameters
available now.
Indeed.
Frankly, at the level of discussion I'm seeing, I
doubt anything
will come of this here.
That may well be true, but my own interest is primarily in the CBM
implementation of IEEE-488, and that, I think, has a reasonably good
chance of going somewhere. I certainly don't mind considering a
hardware design that doesn't make it impossible to support Amigo/cs80
emulation, but since I own no HP hardware of the right stripe and lack
any experience with it, that angle won't be explored by me. I have no
way to test it.
There are numerous ways to go about implementing some sort of modern
IEEE disk as the discussion has already shown. My own preference is
to look into some form of AVR processor with enough I/O lines, and use
"real" GPIB buffers, but then I routinely see IEEE chains of 3-5
devices (just from my own collection of PET stuff). I'd also consider
some flavor of MCS51 device, especially since I just got back a stack
of bare AT89S52 boards that were designed for driving an 8x9 matrix of
LEDs for a clock, but could also be the foundation of a disk board
with a bit of rework. At 32 I/O lines, there's a lot to work with
there, and plenty of horsepower - the real question is if it would
need an external SRAM or not (and it might, for a reasonable
approximation of the low-level CBM DOS routines).
-ethan