14 Mar
2014
14 Mar
'14
11:48 a.m.
When did Intel 3000 series show up?
Dwight
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Date: Fri, 14 Mar 2014 12:17:13 -0600
Subject: Re: 4004 Development System
From: spacewar at gmail.com
To: cctalk at classiccmp.org
On Mar 14, 2014 9:43 AM, "allison" <ajp166 at verizon.net> wrote:
On 03/13/2014 08:03 PM, Eric Smith wrote:
You said "The basic machine clocked at 150nS". That's factually incorrect
unless you were running it slow, and then it would execute an instruction
every 300 ns.
It may well be that some things internally took a third oscillator cycle
due to pipelining, overlapped with the first cycle of the next instruction,
but that doesn't change either the clock period or the instruction period.
With a 125 ns clock period, there's no way any synchronous activity inside
the part can take 150 ns, unless you include setup and hold times, which is
not normal practice. (The necessary setup and hold times are accounted for
in the minimum clock period spec.)
Eric On Thu, Mar 13, 2014 at 4:49 PM, allison
<ajp166 at verizon.net> wrote:
No, not 125, I said 150nS! Apparently it took three edges for certain
things and
the clock was 8mhz. The instructions were executed at a rate of one
every 250nS. The difference in timing was due to some internal pipeline. The Part is 8X300, originally Signetics then SMS
made it.
Other way around, I think. It was originally designed by SMS.
The basic machine clocked at 150nS and completed an
instruction every 250 nS (really!).
125 ns and 250 ns. In other words, 8 MHz maximum with two clocks per
instruction cycle, for a 4 MHz instruction rate. Much faster than any
other production single chip microprocessor in 1977.