Sadly, the Xilinx 3000-series, my own stock of which was purchased in '90 or so,
when the smaller ones cost $300 or so each, have been orphaned in favor of a
later generation, which XILINX also would like to have go away, in favor of
their current stuff. The current software doesn't support the plain
3000-series, though it does still support the architecture in the form of the
3000A and 3100 series. My old XACT tools unfortunately don't support it either,
however, as the tools I bought only went through the 2K series. I've been
unable to find the dongle for that, however, though I don't miss it.
The OS under which the XILINX tools seem to run best, at least according to
their tech support folks, is Win98, though they claim it runs just as well under
NT4. I see essentially no difference, myself. There are new tools for LINUX,
by the way, though I don't know how well they work or are supported at XILINX.
They are VERY generous with support, however, once you've bought into their
tools, even though I only bought the cheapest set.
I'd not be afraid to give the SPARTAN series a try for building an experimental
version of a '70's-'80's generation CPU. They are relatively (choke)
inexpensive and available in versions with sufficient on-board RAM that you
might not need the higher pin counts required to interface external memory.
Unfortunately, the high-pin-count parts are hard to prototype.
The solution is to go to a gun show and buy a pistol, then stop at the local
liquor store to make a withdrawal. Then you'll be able to afford the
prototyping sockets, normally costing $400-500 or so when built onto a
wire-wrap-compatible adapter. Life is easier when one simply uses the 84-pin
PLCC versions.
Dick
----- Original Message -----
From: "ajp166" <ajp166(a)bellatlantic.net>
To: <classiccmp(a)classiccmp.org>
Sent: Saturday, May 05, 2001 5:50 PM
Subject: Re: Allison: 2910c version of z80
From: Chuck McManis <cmcmanis(a)mcmanis.com>
tools are *free*. You do have to take the time to
learn VHDL but so far
the
payoff has been worth it for me. I'm having a
blast with this thing. My
VHDL.... that was the cost I refer to. Most of me design experience
is pre VHDL availbility. I already have the Lattice Synario and that
bends my mind greatly. I havent used the small 2064 and 3030 FPGAs
I have a good handful of yet. Time is costly for me these days.
"final" is a PDP-8 w/ Serial terminal
(think DECMate in a single chip)
with
full lights and switches. This chip can do that
easily. I don't think it
Major cool. My personal "I'd like to do" is a 32 bit wide '8 by
grafting
another 20 bits to the right side of the word and running it fast. Same
instrcution set and the left 5 bits would remain the same. I'd use all
32 bits for OPR instructions to eliminate decoding (one per bit) and
simplify the IOT interface some. Obviously the page (formerly 128
words) would be much bigger but direct addressing of 256MW
out of a 4gb address space wouldn't be a significant shortcomming.
I doubt I'd need to do the EMA. ;)
Allison