7 Sep
2010
7 Sep
'10
8:23 a.m.
On 07/09/10 04:21, Chuck Guzis wrote:
As long as the timer is either wide enough (e.g. 32
bit) or wraps to
0 from its maximum count, it really doesn't matter. AVRs definitely
do wrap and so do a number of other chips. ARM uses a 32-bit timer,
which is more than adequate for floppy use.
In that case, as long as you start the timer at zero and record when it
wraps, there should be no (significant) problem. You'll need to keep
track of last_counter_value modulo max_counter_value and subtract that
from each timer value, but it should work. Just a
little more effort in
the 'decode to delta' stage.
Also, if you use a 32bit counter, you'll need plenty of RAM to store the
counter values... The DiscFerret prototype stores around 100,000 sample
points for a 500kps MFM track (1.4MB PC HD floppy). Each SP is one byte
long on the DF; quadruple that for a 32-bit counter and you need about
400kbytes of RAM... not practical on most microcontrollers.
The FDC37C78 is still listed in SMSC's current
production, but I"ll
agree that it's not easy to find on the spot market. It does have
selectable precompensation (port 3F4):
http://www.smsc.com/media/Downloads_Public/Data_Sheets/37c78.pdf
Neat. Seems a lot of modern "all-in-one" style Super I/O controllers
have really poor data separators and precomp engines though. I've never
found a PC controller that could even read BBC Micro floppies (250kbps
FM 5.25in) without complaining.
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/