26 Aug
2014
26 Aug
'14
1:12 p.m.
On Tue, Aug 26, 2014 at 1:43 PM, Brent Hilpert <hilpert at cs.ubc.ca> wrote:
A niggling question I have in the back of my head, is
whether or not some/many memory boards will work with the Altair front panel.
As stated in my previous message the front panel expects a memory board to be putting
data onto the DI bus to be observable on the LEDs when idle, the front panel does not
latch the data from a last memory cycle.
I suspect many memory boards don't do this, they may only put (strobe) data onto the
bus during the active portion of a memory cycle. The bus lines would then revert to the
high state and all you would see is ON LEDs.
I'm not terribly familiar with the details of the S-100 bus, and not
at all with the Altair, so please excuse my ignorance, but surely even
a static RAM board won't drive the bus for any significant length of
time after the bus read cycle is over. This suggests that for the
front panel without data latches to be able to examine memory, the
front panel (or something related to it) would have to keep the bus
read cycle active indefinitely, perhaps by driving a ready line false.
I would think that even a DRAM board would have to hold the read data
on the bus as long as the bus read cycle hasn't terminated, because it
has no other way to know when the bus master has actually accepted the
data.