OT: DRAM memory controllers within FPGAs

You don't say how much memory you're needing but I would hazard a guess that for many hobbyist or classiccmp-type projects that SRAM could be made to work with little effort. Not that SRAM is cheapest per bit, but in terms of results per unit effort it's hard to beat. Of course it depends on what your desired result is... if you really truly want a DRAM controller, then SRAM won't satisfy you. But in terms of least effort to desired result I think SRAM is a clear winner even if you end up paying more per bit. e.g. when in the late 90's I made a device for reading out arbitrarily formatted floppies and hard disks at MHz rates it was completely trivial to make a fast bit-buffer out of a SRAM chip and a couple of TTL counters and shift registers. Old classiccmp post: http://www.classiccmp.org/pipermail/cctalk/2000-July/151774.html Tim.