4 Jul
2000
4 Jul
'00
1:11 p.m.
The CPLD offers a number of advantages over
FPGA's. They're not the same.
An FPGA uses a RAM lookup table in to define the function executed by a
logic cell. CPLD's use EPROM/EEPROM cells to store the logic configuration.
Most FPGA's require an external configuration prom of one sort or another,
which it boots on reset.
Actually it's pretty easy to get an Xylinx FPGA to read a program from a
serial or parallel line, so all you need to do to reprogram is assert reset
and feed in the data correctly. But I can see your point on the CPLDs. I
generally go FPGA because I like to have lots of available logic for
flexibility's sake. Anyone have schematics for a large number of floppy
controllers? :)
Eric