6 Jul
2014
6 Jul
'14
11:14 p.m.
On 07/06/2014 08:47 PM, Eric Smith wrote:
I still haven't figured out how to get interrupts
from the uPD765 FDC in
the Quay. I think they're probably routed via a Z80-PIO input, but no luck
so far.
While the DMA support in the uPD765 is by design optional, they clearly
*really* intended that interrupts be used. The Quay boot ROM just uses a
very long fixed delay after the recal before doing a read. That's
obviously not great if you want good performance.
I tried several unsuccessful approaches to waiting for a recal or seek to
complete before finally noticing that the FDC will reject the "sense
interrupt status" command as illegal if there isn't a pending interrupt.
Now my code issues that command repeatedly until it does not report an
illegal command.
Has anyone found an easier way to use the uPD765 without interrupts?
It can be done. Take a look at main status register, which can always
be read. Bits 0-3 are set while seeking (if the drive select feature of
the 765 is used (the PC doesn't), you can have up to 4 simultaneous
seeks in progress. Bit 4 will tell you if a read or write is in
progress; when you're not using DMA, bit 5 will tell you when it's safe
to read the result status. Bits 6 and 7 control the direction and
status of the data bus.
Where things get sticky is the case of tying the READY input to the 765
active, so drives always look ready. The controller will hang and will
require a hard reset to get back to business.
Hope this helps.
--Chuck