12 Aug
2012
12 Aug
'12
5:22 a.m.
On Fri, Aug 10, 2012 at 01:19:23AM -0400, William Donzelli wrote:
Well, the floor plan for a first generation SPARC cpu was hanging in an
office in a certain east german university in the year 1989. Then certain
changes happened and the massive reverse engineering efforts there stopped.
Quite a few years earlier, they had designed the U880 as an almost
functionally identical copy of the Z80 via reverse-engineering the
original chips.
Kind regards,
Alex.
--
"Opportunity is missed by most people because it is dressed in overalls and
looks like work." -- Thomas A. Edison
For
"hands on" experiences, that ultimately means that every exhibit
will degrade into some sort of replica.
Yes, I suppose. The pre-WW2 airplane people are headed this way
already. Look up "Rhinebeck Aerodrome".
Well, at least until the singularity let's us
reverse engineer circuit
diagrams from chips. The imaging of 6502 and SID chips yielding an
executable simulation of the chip is probably the route that we'll
have to take. We'll end up with an executable simulation, but still
be lacking in design documents.
Keep in mind that the design tools that can be used to reverse
engineer VLSI chips will also continue to improve. These days, taking
a first generation logic IC and *completely* reverse engineering it is
completely feasible even with outdated tools. What will it be like in
2042? Fancy SGI VLSI may turn out to be child's play.