7 Dec
2014
7 Dec
'14
9:25 a.m.
From: Jon Elson
Power the system off for 10 minutes, then power on and
read various
locations. If data bit 4 shows 1's and 0's, then the reading is OK, and
it is the writing path that is stuck.
I'm not sure this will work, as the anomalous voltage I see (2V) is after the
output (i.e. to the QBUS) data latches, but before the bus transceiver: i.e.
in the output (reading) path. So I know it's the output data path that has a
problem, not the input.
The only question is which of three chips on the output data path might be
the cause of the problem; one of the two three-state latches (one for memory
data, one for CSR data), or the bus transceiver. As far as I can tell, those
are the only three devices attached to that conductor (where I see the
constant 2V).
Noel