Tarbell is making me insane

I think the crystal on the tarbell has been changed from 4MHz to 2MHz. I do know that one of the failure modes is for the Tarbell to "crash" within a wait state. I read the manual and when it started talking about not using "Active" wait state generation I was given a hint. The tarbell as I received it was using XRDY for wait states. My front panel uses XRDY. When I was developing the Altair kit I found that the 1k memory card would NOT deposit or examine because the PRDY was being driven by the front panel. The 1k memory card would have to basically over power the front panel buffer. This would cause some nice transients too. So this morning I changed the tarbell from XRDY to PRDY and it worked. It has worked fine every time I have tried it since, so maybe I found the 'BUG'. So, WHY do all these old cards use 8T97 type drivers to force the wait line? I guess its only the MITS display board and 1k memory board that drive the wait line regardless of if they are addressed or not. Whats wrong with these guys using open collector parts with a pullup??? I'll report on how robust it is later on. I've had several false starts with this setup... I checked that. Grant