On 26 Feb 2009 at 22:22, Dennis Boone wrote:
I always assumed the 12-60 relationship existed
because the 12-bit
architecture derived from a previous CDC design, and because it was
somewhere between helpful and important that they be a multiple.
But I haven't run into anything that talks about it. Anyone have a
reference I should have RTFMed by now?
Well, the PPU design is basically a reworked and regurgitated CDC
160A, a 12-bit design, shared among 10 sets of memory and registers
(A,P,Q and K) so each PPU got its slot in the barrel every 10 minor
cycles (or every 1 usec., which was also the speed of a core bank).
But did the PP word size determine the CPU word size? I don't know.
Maybe a 72 bit word length might have made more sense, as that would
have matched the 7090 double-precision word size. On the other hand,
everything about the 6000 architecture does "fit together" nicely.
Maybe there's something in the CHM oral history archives.
--Chuck