ISTR the bitrate from a ST412 drive was about 5 MHz,
or one bit every
200 nsec/8 bits per 1.2 usec. That doesn't seem to be all that high
to me--at least not in terms of today's logic. I think I remember
that RLL 2,7 drives had to be able to handle 7.5 MHz data.
What do the signals on the data connector look like? I seem to
recall that there are some differential pairs on there...are they
analog or digital?
They are digital level signals. Normally there's a differential pair for
read data nad one for write data. The drivers are 26LS31s or similar, the
recievers 26LS32s.
But of course they're sort-of analogue in time. In that they're a
repreestation of the raw data stream to/from the heads. IIRC it's very
like a floppy drive, a pulse on the write data input causes a flux
transition on the disk on writing, while on reading a flux transisiton on
the disk casues a constnat-width pulse on the read data signal. While the
pulse width is not controlled by data on the disk (but by a one-shot on
the logic board), the exact timing of that pulse does come from the disk,
and can be essentially any value within the spec of the drive.
The obvious thing to do is to sample the data stream (either from the
controller wehn writing/formatting, or from a good drive if you want to
copy it) at about 10 times the data rate (that's where the 'high speed'
requirement comes from) and record it in flash memory or something. Then
replay it back to the cotnroller for reading. It's doable, but getting it
all working at 50MHz is not going to be trivial.
If emulating a drive though, couldn't one standardize on one valid
(faster) data rate (versus the difference between inner/outer cylinders) ?
If you have the bitstream represented, and the timing variability need
not be duplicated, wouldn't this become simpler (and hence more
feasable) ?
-- Curt
