23 Jul
2018
23 Jul
'18
6:59 a.m.
From: Charles Dickman
an 11/84 with the UNIBUS adapter and PMI memory does
not have a Qbus.
... the KDJ11-B (M8190) bus protocols change when a KTJ11 (UNIBUS
adapter) is present and so what would be expected to be Qbus isn't.
Ah, excellent point.
Looking at the description of the CPU/UBA adapter in the KDJ11-B User Manual
(EK-KDJ1B-UG-001, pp. 7-6 to 7-9), the answer is not certain; it all depends
on implementation details on the CPU card which aren't described.
E.g. the DMA cycle _might_ work, it all depends on what happens at step 8
when, instead of PBSY being asserted, BSYNC is asserted. The _memory_ will be
fine (since in an -11/83, this kind of thing is expected)... but the _CPU_,
who knows.
Interrupt cycles are more problematic; the assertion of the interrupt level
on the BDAL lines (step 1a) will probably pass, but step 6 (assertion of
BSACK) may be an issue, since the device will want to assert BRPLY instead
(BSACK is not used in a QBUS interrupt), and the CPU may not do the right
thing.
I think there was a DEC Micronote that explained the
protocol
modifications involved.
I don't think so; #30 "PMI on KDJ11-B and MSV11-J" describes the _basic_
PMI, but the interaction with the UBA isn't described there. But the
KDJ11-B User Manual has it in some detail.
Noel