17 Nov
2001
17 Nov
'01
8:09 a.m.
"Stan Sieler" <sieler(a)allegro.com> wrote:
Re:
Development of Alpha started in 1968 and ran concurrently (if somewhat
on a back burner, because everybody thought the 32-bit Omega was a
more exciting project) w/r/t Omega until Omega's cancellation in 1970.
November 1972 is when the first systems (called HP 3000) were shipped
to customers. The re-release (which was somewhat improved hardware
and software and also called HP 3000 initially, but later came to be
called the Series I) was in October 1973.
(Reference for the above: Christopher Edler's "The Strongest Castle"
paper)
See my earlier post about how they started back
in '73;
1972, but the actual "start" date is hard to pin down. Was it first
introduction, or the re-introduction (after it was pulled off the market)? The 16-bit HP 3000 was never multi-CPU. The HP 3000
Series III, introduced
in 1978, *did* have one instruction that was intended to support
having a second CPU, but nothing was ever done with it. The multiple-CPU
support came with the PA-RISC system, with release MPE XL 3.0
Somebody had ideas about it being a dual-CPU shared-memory system
early on. Looking at the HP3000 Computer System Reference Manual from
September 1973, I see that locations %10-%13 were reserved for the
second processor's current PCB pointer, QI, ZI, and interrupt count.
The Series II added two instructions: LOCK and UNLK, which were used
to provide a sort of in-memory semaphore. I'm not sure they were
present in the Series III. The Machine Instruction Set manuals I have
handy have them footnoted with "Series II computer systems only".
What I don't know is whether MPE ever had dual-CPU support. If it
didn't, I wonder how they worked out that having an in-memory
semaphore would be a good idea.
-Frank McConnell