1 Oct
2009
1 Oct
'09
3:03 p.m.
----- Original Message -----
From: "Chuck Guzis" <cclist at sydex.com>
To: "General Discussion: On-Topic and Off-Topic Posts"
<cctalk at classiccmp.org>
Sent: Thursday, October 01, 2009 11:32 AM
Subject: Re: PCjr NMI and 8253 Timer interactions
On 30 Sep 2009 at 11:31, CSquared wrote:
Neat! I never thought of that, but I can see that it would work just fine.
I'm pretty sure I made the mistake of changing the 8253 counting rate
without compensating for it as you describe. I probably could have lived
with an 11ms interrupt rate too. I was porting a good-sized semi-ancient
program from PLM-51 on an 8032 to C and PLM-86 to run on an embedded PC
motherboard, and did not want to have to change a whole bunch of timing
constants with the attendant risk of overlooking something. I wound up just
changing all the constants instead. I'll have to keep your idea in mind for
future reference. Believe it or not, I still do a bit of development under
DOS at times.
Many years ago I tried a similar trick. I think
I wanted a 10
millisecond interrupt rate instead of 55ms for an embedded DOS
application, and I got it to work - sort of. However, I soon
discovered that many other things including the Borland delay()
function depend on the 55ms interval, so I rather quickly abandoned
that line of thinking. I rather suspect your PCjr keyboard driver is
making similar assumptions regarding the tick rate.
Several programs made this work on the PC, as long as the interval
could be a sub-multiple of 55 msec. So, for instance, if you could
live with 11 msec. or 5.5 msec., this is how you would do it.
Hook the interrupt 9 vector and create your own ISR for 4 of 5 timer
interrupts, then direct the the 5th to the normal vector. All that's
required in your ISR is any register saving required for your own
needs, and a routine to issue an EOI to the 8259. Works like a
charm--everything runs just as it should.
However, on Mike's Peanut, there is no 8259. Everything goes through
the NMI handler--a very bad decision on IBM's part, seeing as how the
8259 was one of the least expensive Intel 8x support chips. A
rudimentary prioritized interrupt system could have been implemented
with a priority encoder and some other glue.
I did not know that; I've never done anything at all with a PCjr.
Cheers,
Chuck