On 05.01.2014 16:19, Al Kossow wrote:
I thought some more about the form factor last night,
and it occurred to me that
using a mezanine is a waste of PCB space.1
You can fabricate two boards connected with one or two pair of right angle
DIN-96 connectors and stiffen the joint with two
small steel flats that have been tapped for four screws that attach to the edges
just inside the card guide space.
The bars wouldn't go up far enough to interfere with the .1" connectors coming
out the side.
Good idea, of course.
I'd think
of using a larger FPGA instead of an external ARM SoC.
This project (BitHound) makes me think something like that is something I could
understand.
http://www.bastli.ethz.ch/index.php?page=BitHoundEn
Nice. But I got blinded by the camel case in the VHDL source. It hurts. VHDL is
case insensitive - another reason to use *good* names like good_name, clock_in,
reset_n and so on.
You don't need such a big project with many strange cores to get the
understanding. Understanding the digital stuff is SIMPLE. It's not much about
it. You just have to find and turn a few little switches in your head.
Once you have managed to do that you will love programming FPGAs. I'm sure.
Kind regards
Philipp
--
Dipl.-Inf. (FH) Philipp Hachtmann
Buchdruck, Bleisatz, Spezialit?ten
Alemannstr. 21, D-30165 Hannover
Tel. 0511/3522222, Mobil 0171/2632239
Fax. 0511/3500439
philipp at
hachtmann.com
www.tiegeldruck.de
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