On 1/24/2006 at 6:31 PM ard at p850ug1.demon.co.uk wrote:
But that could never happen. You would only write
one byte at a time, so
not more than 8 relays would switch at once.
Let's think about this...
Could you really make a memory cell with 1 relay per bit using standard
relays? Latching relays, perhaps, but regular "make on coil current/break
on no current" relays?
Who said anything about 'standard' relays? I was certainly considering
multiple coil or latching realys.
With stnadard relays, you can make a latch with one relay (connect an NO
contact in series with the coil across the supply). You need to put a
break contact of some other relay in series with that so as to be able to
reset the latch
What I have not worked out is whether that break contact needs to be on a
separate relay for each bit, or wheter you can make some kind of tree
decoder structure that can only open the supply to one relay at a time. I
think the latter is possible (I am assuming the existance of
make-before-break relay contact sets so as not to have problems with
glitches).
Intuitively, if you can have a series tree structure of make contacts to
create a 1-of-n decoder, you can have a parallel structure of break
contacts too. It's not quite that easy, you need a separate set of
cotnacts on each decoder relay for each output. That means you need 256
pole relays to make a 8-bit to 256 output decoder. I suspect 8 pole
relays exist or could be made (4 and 6 pole certainly do), that means 32
of them to do the job of one 256 pole relay).
Then there's the issue of addressing. 32KB would probably entail a 7x8x8
structure.
Se above.
I'd expect that being able to change the state of a bit might require an
extra relay or two per bit, given an XY-select sort of structure. How
about 4 relays per bit?
It's normally taken to be at least 4 transsitors per bit, but I think you
need fewer relays than that.
Of course, we could implement memory as a
recirculating shift register,
which ought to be lots of fun to listen to...
How about using uniselectors and having decimal (or octal) memory ?
-tony