30 Sep
2014
30 Sep
'14
7:33 p.m.
On Sep 30, 2014, at 10:08 PM, Mark J. Blair <nf6x at nf6x.net> wrote:
On Sep 30, 2014, at 17:44 , David Riley <fraveydank at gmail.com> wrote:
You and I are on the same page. I've done it for Qbus and
Unibus SPC (though as I mentioned, I have not covered the
CD lanes, due to a lack of time and somewhat sparse details).
I'd love to have a chat (probably off list) about what can
be done as far as bus drivers/receivers and how to protect
the pins that conflict; I have some concrete ideas that may
work. And it looks like I'll be getting an 11/44 soon, so
I'll actually be able to test Unibus cards...
- Dave
Indeed, that's actually something I'm
planning on figuring
out; my current quandary is mapping Unibus pins against
Qbus pins in order to figure out why one might cook the
other (main answer I see so far: Qbus has a standard +12v
power pin on what is normally a data pin for Unibus, but
it's nothing that can't be worked around with modern
electronics). Next step will be figuring out what's going on
with common CD bus pins that cause the same problem; it
may actually be the same thing, but I haven't looked closely
enough at a full pinout of the CD bus to get an idea yet.
I've composed a spreadsheet or two which compares these pinouts, with the thought of
seeing how hard it would be to make an FPGA-based double-wide card that might be usable in
multiple DEC busses with suitable programming. I'll export to PDF later this
evening...