27 Oct
2017
27 Oct
'17
12:04 p.m.
On 2017-Oct-27, at 11:28 AM, Paul Koning via cctalk wrote:
It helps to have a machine built with sane design
principles. Things like RS flops that don't have both inputs active at the same time.
And a properly clocked architecture. Neither of these properties holds for the CDC
6600...
True of a lot of 50s / 60s / even early-70s logic, designers took a lot of 'electronic
shortcuts' to save components, capacitive coupling for instance being popular.
Flip flops with half-a dozen options of semantically different input types which could be
combined in multiple, so every flip-flop in the system was unique with it's particular
set of (sometimes many) input options.
One logic design I encountered had a type of logic element specifically intended (from
what I could figure) to soak up glitches.
It could take in multiple inputs with edges occurring at slightly skewed times and ensured
that only one slightly-delayed edge would be propagated out.