My first prototype of my all-digital clock-data separator circuitry was
wire-wrapped and operated nicely at 80 MHz. The speeds mentioned by Emanuel are
certainly realistic, and certainly not the upper end of what was done with
wire-wrapped high-speed logic.
When high-speed (CMOS/STTL/FTTL) circuits failed to function reliably using
wirewrap technology, it was normally due to inadequate power supply
distrubution/bypassing. ECL always worked very well with wirewrap, often
better than with PCB's.
Dick
----- Original Message -----
From: "emanuel stiebler" <emu(a)ecubics.com>
To: <classiccmp(a)classiccmp.org>
Sent: Friday, May 04, 2001 9:23 AM
Subject: Re: How many transistors in the 6502 processor?
jpero(a)sympatico.ca wrote:
And then it'd be rather fun to implement your
very own 6502 using 74*
series logic chips.
Possible, but length of traces to wire all those together will keep
it to KHz range and needs few large boards that needs so much power
that hottest athlon cpu is low power by comparsion.
Nope. If you know what you're doing, you can wire wrap boards pretty
easy up to 20-30 MHz.
We had to do it many times for graphic boards.
cheers