On Jun 11, 2013, at 11:46 AM, Dave McGuire <mcguire at neurotica.com> wrote:
On 06/08/2013 08:08 PM, Guy Sotomayor wrote:
I found this a while ago. I just think it's
so cool to implement a Forth CPU
in 200 lines of Verilog. A complete system including a TCP/IP stack fits
in 8K bytes!
Here's the link:
http://excamera.com/sphinx/fpga-j1.html
That's very cool indeed. I've gotta do something with that.
What I find cool about it is that with a reasonably sized FPGA you can do
a fairly complex system (including all of the RAM) from within the FPGA.
TTFN - Guy