On 11 Nov 2008 at 22:40, Roger Holmes wrote:
Do we know this core memory has "inhibit
lines"? My only core
experience is with 2D planes and I've not heard of inhibit lines,
maybe they are the magic that allowed 3D stacks to be made. On my
core, half the current required is supplied on two separate wires, if
you don't know the current required and you send the critical amount
down one wire you will clear the entire memory in one go.
Yup, it's in the IBM document
http://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/19730063841_19730
63841.pdf
See page 73-74 (document 2-51). It even states that the inhibit
lines are driven from +20vdc. The document is a wealth of
information regarding memory organization, timing, drive, etc. I
recommend reading it.
Core memory is 28 bits wide, consisting of two 14-bit "syllables".
Each syllable has 1 parity bit+13 data bits.
How many computer systems had a 13/26 bit word? Is this the only
one?
Cheers,
Chuck