8 Apr
2013
8 Apr
'13
3:07 a.m.
On 04/07/2013 06:20 PM, Toby Thain wrote:
On 07/04/13 5:33 PM, allison wrote:
The older LSI11 systems had it if
there was a call for non volatile
memory, the cost was high.
I happen to have 16KW of qbus core. Also core had a far slower cycle
time than Ram of
the day. Core that ran at 1.5us was fast where ram on the day was under
1us and dropping.
That's odd, I seem to recall my handbooks claiming lower latencies for
(Unibus?) core than the MOS products in the same range, but don't have
the right handbook to, uh, hand.
Can you verify those latencies from your handbook?
--Toby
That likely was not true for Core on any bus. Core to read it you must
write it back and the
cycle for that is long. MOS memory was far faster and didn't have the
write after read
requirement.
I have little on Unibus as I restrict my collection to Qbus.
Allison
The fact
that it had 4MB of ram was uncommon as back in the day
that was
as costly as the base machine if not more.
I understand that memory was at a
premium back then.
Out of interest, how common was core memory (H223 and similar) in QBUS
systems?
Is BBU supported for the MOS memory options?