8 Dec
2007
8 Dec
'07
11:50 p.m.
On 9 Dec 2007 at 0:15, der Mouse wrote:
Nice idea, but it doesn't work. Draw out three
NANDs cross-coupled as
you described. Mark the logic states for a stable state with one
output low. Now consider what happens when each of the inputs goes
low. The only one that does anything is the one feeding the gate whose
output is low.
Yeah -- I see that. Release a button and the circuit goes into an
unstable state. I wonder what the smallest number of active devices
is for an n-stable circult with n greater than 2.
8 D flip=flops with each switch connected to a PRESET input and a
NAND (or NOR) to edge-clock in a reset state looks to be far from the
minimum. How about some capacitively coupled logic with a few
steering diodes?
Cheers,
Chuck