21 Nov
2006
21 Nov
'06
7 a.m.
From: "Don North" <ak6dn at mindspring.com>
Using all these pieces I was able to implement a
PDP-8e (no EAE, at least
yet)
that passes all the basic CPU diagnostics. Cast in hardware on the
digilent
Pegasus it occupies about 13% of an XC2S200-6, and runs at 15ns per clock
tick
(4 ticks per cycle), which is about 20X faster than a real PDP-8m
(1200ns/60ns).
The base CPU is about 500 lines of verilog.
One of the questions I have kicking around (I even bought an XESS
board) was: How hard would it be to get a PDP-8 core into an FPGA
and arrange the pinout to correspond to the 6100 or 6120?
Then it wouldn't be necessary to desolder 6120's from Decmates to
get our SBC6120's working :-).
Vince